University of Jordan

Computer Engineering Department

CPE 432: Computer Design

Fall 2007

 

Instructor Dr. Gheith Abandah
Email abandah@ju.edu.jo
Home page http://www.abandah.com/gheith
Office Computer Engineering 405
Office hours
bulletSunday and Tuesday 9:00-10:00
bulletMonday and Wednesday 10:00-11:00
No. of credit hrs 3
Prerequisites CPE 232
Time and room
bulletSection 1: Sun, Tue, and Thu 8:00-9:00, Computer Eng. 001
bulletSection 2: Sun, Tue, and Thu 15:00-16:00, Computer Eng. 001
Textbook Hennessy and Patterson. Computer Architecture: A Quantitative Approach, 4th ed., Morgan Kaufmann, 2007.
References

  1. Patterson and Hennessy. Computer Organization & Design: The Hardware/Software Interface, 3rd ed., Morgan Kaufmann, 2005.

  2. D. Culler and J.P. Singh with A. Gupta. Parallel Computer Architecture: A Hardware/Software Approach, Morgan Kaufmann, 1998.

  3. J. Hayes. Computer Architecture and Organization, 3rd ed., McGraw-Hill, 1998.
Grading
Mid-Term Exam 25%
3 Homeworks and 2 Quizzes (5 points each) 25%
Final Exam 50%
Policies
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Attendance is required.

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All submitted work must be yours.

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Cheating will not be tolerated.

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This course requires significant effort.
Tentative outline
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Introduction

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Instruction Set Principles

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Review of Pipelining

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Instruction-Level Parallelism and Its Exploitation

Midterm Exam

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Limits of Instruction-Level Parallelism

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Multiprocessors and Thread-Level Parallelism

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Memory Hierarchy Design

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Storage Systems

Final Exam

Special Dates
Thu 11 Oct 2007 Homework 1 Announcement
Sun 14 Oct 2007 No Lecture, Eid Alfiter
Thu 18 Oct 2007 Quiz 1 and Homework 1 Due
Thu 15 Nov 2007 Homework 2 Announcement
Thu 22 Nov 2007 Homework 2 Due in class
Mon 26 Nov 2007 Midterm Exam
Thu 6 Dec 2007 Homework 3 Announcement
Thu 13 Dec 2007 Quiz 2 and Homework 3 Due
Thu 20 Dec 2007 No Lecture, Eid Aladha
Sun 23 Dec 2007 No Lecture, Eid Aladha
Tue 25 Dec 2007 No Lecture, Christmas
Tue 1 Jan 2008 No Lecture, New Year
Tue 8 Jan 2008 Last Lecture
Tue 16 Jan 2008 Final Exam
Handouts

Slides

  1. Introduction and Technology Trends
  2. Quantitative Principles of Computer Design
  3. Instruction Set Principles
  4. Review of Pipelining
  5. Instruction Level Parallelism - Part I
  6. ILP II: Branch Prediction
  7. ILP III: Dynamic Scheduling
  8. ILP IV: Speculative Execution
  9. ILP V: Multiple Issue
  10. Limits to ILP
  11. Thread Level Parallelism
  12. Multiprocessor Introduction
  13. Snooping Cache Multiprocessors
  14. Directory-Based Multiprocessors
  15. Memory Hierarchy Review
  16. Advanced Memory Hierarchy
  17. Storage

Homeworks

  1. Homework 1: Due Thu 18 Oct 2007, Solution
  2. Homework 2: Due Thu 22 Nov 2007, Solution
  3. Homework 3: Due Thu 13 Dec 2007, Solution

Quizzes and Exams

  1. Solutions of quizzes given on Thu 18 Oct 2007: Q1A, Q1B, Q1C
  2. Solution of the midterm exam
  3. Solutions of quizzes given on Sun 16 Dec 2007: Q2A, Q2B

Course Grades for the Two Sections