| Instructor |
Dr.
Gheith Abandah |
| Email |
abandah@ju.edu.jo |
| Homepage |
http://www.abandah.com/gheith |
| Office |
Computer
Engineering
405 |
| Office
Hours |
 | Monday 14:00-15:00 |
 | Sunday and Tuesday 10:00-11:00 |
|
| Prerequisites |
CPE 231: Digital Logic |
| Time
and Room |
 | Section 1: Sun, Tue, and Thu 8:00-9:00,
CPE 001 |
 | Section 2: Sun, Tue, and Thu 9:00-10:00,
Middle
Auditorium |
|
|
Textbook |
Patterson and Hennessy. Computer Organization &
Design: The Hardware/Software Interface, 3rd ed., Morgan Kaufmann,
2005. |
| References |
-
Hennessy and Patterson. Computer Architecture: A
Quantitative Approach, 3rd ed., Morgan Kaufmann, 2002.
-
J. Hayes.
Computer Architecture and Organization, 3rd ed., McGraw-Hill, 1998.
-
M.
Mano. Computer System Architecture, 3rd ed., Prentice Hall, 1993.
|
| Grading |
| Midterm Exam |
30% |
| Second Exam |
10% |
| Home works and Quizzes |
10% |
| Final Exam |
50% |
| Policies |
 |
Attendance is required |
 |
All
submitted work must be yours |
 |
Cheating
will not be tolerated |
 |
This
course requires significant effort |
|
| Tentative
Outline |
 |
Introduction |
 |
MIPS
Instruction Set |
 |
Computer Arithmetic |
 |
CPU
Performance |
Midterm Exam
 |
Datapath Design |
 |
Control Design |
 |
Pipelining |
Second
Exam
 |
Memory
Hierarchy |
Final
Exam
|
|
|
|