Computer Organization – Fall 2012

Course No: 0907335
Course Name: Computer Organization

Facebook page:


  • من أنا؟ (ppp)

Reading Assignments:

Chapter 1: Read Sections 1.1 through 1.4. Pay attention to: supercomputer, terabyte, embedded computer, multicore, system software, assembler, DRAM, SRAM, cache memory, VLSI, system CPU time, CPU time equation, CPI, and instruction mix. Also, examine the table in Page 38 and solve the “Check Yourself” problem in this page.

Chapter 2: Read Sections 2.1 through 2.10. Pay attention to: stored program concept, address, alignment restriction, register spilling, signed and unsigned binary numbers, negation, sign extension, instruction format, binary to hexadecimal and back, opcode, compiling if-then-else, compiling while loop, basic block, return address, program counter, stack and stack pointer, MIPS memory allocation, and the 5 addressing modes. Make sure that you know the function, format, and encoding of the instructions: add, sub, lw, sw, addi, sll, srl, and, andi, or, ori, nor, beq, bne, slt, slti, sltu, sltiu, jal, jr, j, lb, lbu, lh, lhu, sb, sh, and lui. Also, solve the “Check Yourself” problems in Pages 93, 101, and 105.

Chapter 3: Read Sections 3.1 through 3.5. Pay attention to: binary addition and subtraction, multiplication algorithm, refined multiplication hardware, faster multiplication, multiply in MIPS, division algorithm, divide in MIPS, floating-point representation and IEEE 754 standard, conversion from and to binary and decimal FP, FP addition, FP instructions in MIPS.

Appendix C: Read Sections C.5 and C.6.

Chapter 4: Read Sections 4.1 through 4.7. Pay attention to the functions and connections of the components shown in Figure 4.2, the register file design, datapath, ALU control, main control unit, effect of the control signals, multi-cycle implementation, multi-cycle control unit, pipelining, structural hazards, data hazards, load-use hazard, forwarding, control hazards, branch prediction, pipelined datapath and control, forwarding unit, and hazard detection unit.

Appendix D: Read Sections D.1 through D.6.

Chapter 5: Read Sections 5.1 and 5.2 (up to Page 464).

Due on the First Exam day. Must be handwritten. Chapter 1: 1.1-26, 3.4-5, 4.1-2, 4.4. Chapter 2: 4a, 8.1-2a, 10, 13a, 16a, 17.4a, 18.2a, (20.1a and simulate your corrected program using SPIM. Submit printout for the contents of the registers after calling FACT for argument 4).

HW2: Due on the Second Exam day. Must be handwritten. Show your work clearly. Appendix C: (1) Using the components shown in Figure C.5.10, design a 4-bit ALU. Solve Exercises C.26 and C.27. Chapter 3: (1) Using the algorithm shown in Figure 3.5 (but for 4 bits instead of 32 bits), show the contents of the three registers shown in Figure 3.4 when multiplying 1101 by 0101 over the 4 multiplication steps. (2) Using the algorithm shown in Figure 3.10 (but for 4 bits instead of 32 bits), show the contents of the three registers shown in Figure 3.9 when dividing 1101 by 0101 over the 5 division steps. (3) Covert -7.5 and 3.125 to single-precision FP numbers and add them using the algorithm shown in Figure 3.15. Chapter 4: (1) On Figure 4.2, specify the values of the control signals to execute (a) the slt instruction (b) the beq instruction.


  • Course Outline (pdf)
  • Introduction (ppp)
  • Introduction and Performance (ppp)
  • Instructions Language of the Computer (ppp)
  • Using PCSpim (Example1.doc)
  • Computer Arithmetic I (ppp)
  • Computer Arithmetic II (ppp)
  • The Processor Datapath and Control (ppp)
  • Multi-cycle Processor Approach (ppp)
  • Large and Fast: Exploiting Memory Hierarchy (ppp)


  • Solution of Homework 1 (doc) password protected
  • Solution of Homework 2 (doc) password protected
  • Solution of Quiz 1 (pdf)
  • Solution of the midterm exam (pdf)
  • Solution of Quiz 2 (pdf)

Grades and Attendance:

  • Grades and attendance as of 18/12/2012 (pdf)

Last update on 18/12/2012, 11:53 am