University of Jordan

Computer Engineering Department

CPE 731: Advanced Computer Architecture

Fall 2009

 

Announcements Nov 9, 2009: Reading Assignment References 9, 7, and 12

Oct 21, 2009: Reading Assignment Chapter 2 and Appendix B of Reference 1

Sep 30, 2009: Reading Assignment Chapter 1 and Appendix A of Reference 1

Sep 30, 2009: منح صندوق دعم البحث العلمي لطلبة الدراسات العليا

 

Instructor Dr. Gheith Abandah
Email abandah@ju.edu.jo
Home page http://www.abandah.com/gheith
Office Computer Engineering 405
Office hours
bulletMon 10:00 - 11:00
bulletTue 10:00 - 11:00
bulletThu 12:00 - 1:00
No. of credit hrs 3
Prerequisites None
Time and room Mon and Wed 5:30-7:00, CPE 001
Textbook Hennessy and Patterson. Computer Architecture: A Quantitative Approach, 4th ed., Morgan Kaufmann, 2007.
References
  1. Patterson and Hennessy. Computer Organization & Design: The Hardware/Software Interface, 3rd ed., Morgan Kaufmann, 2005.

  2. D. Culler and J.P. Singh with A. Gupta. Parallel Computer Architecture: A Hardware/Software Approach, Morgan Kaufmann, 1998.

  3. J. Hayes. Computer Architecture and Organization, 3rd ed., McGraw-Hill, 1998.

  4. Readings in Computer Architecture, Mark Hill (Editor), Norman Jouppi (Editor), Gurindar Sohi (Editor), Morgan Kaufmann Publishing Co., Menlo Park, CA. 1999

  5. Research Papers

  6. Research Projects: Reports, presentations, and references

  7. Simulation Projects: Reports, presentations, and references

Grading
Mid-Term Exam 30%
Research Report and Presentation 30%
Simulation Project and Final Exam 20% + 20%
Policies
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Attendance is required.

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All submitted work must be yours.

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Cheating will not be tolerated.

Catalogue Description Review of computer design principles, processor design, RISC processors, pipelining, and memory hierarchy. Instruction level parallelism (ILP), dynamic scheduling, multiple issue, speculative execution, and branch prediction. Limits on ILP and software approaches to exploit more ILP. VLIW and EPIC approaches. Thread-level parallelism, multiprocessors, chip multiprocessors, and multi-threading. Cache coherence and memory consistency. Advanced memory hierarchy design, cache and memory optimizations, and memory technologies. Advanced topics in storage systems. Designing and evaluating I/O systems.
Tentative outline
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Introduction

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Review of Advanced Processor Designs

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Instruction-Level Parallelism and Its Exploitation

Midterm Exam

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Limits of Instruction-Level Parallelism

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Multiprocessors and Thread-Level Parallelism

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Memory Hierarchy Design

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Storage Systems

Final Exam

Special Dates
Mon 28 Sep 2009 Classes Begin
Mon 26 Oct 2009 Research proposal is due
Mon 2 Nov 2009 Presentations of the research proposals
Mon 16 Nov 2009 Midterm Exam (5:30-7:00)
Mon 23 Nov 2009 Research report is due and start of presentations
Mon 7 Dec 2009 Simulation project proposal is due
Mon 14 Dec 2009 Presentations of the simulation project proposals
Mon 4 Jan 2010 Simulation project report is due and start of simulation project demonstrations
Wed 6 Jan 2010 Last Lecture
Thu 14 Jan 2010 Final Exam (9:00-11:00)
Handouts

Slides

  1. Introduction
  2. Modern and Future Processors
  3. Technology Trends
  4. Quantitative Principles
  5. Pipelining Review
  6. Research Project Directions
  7. Instruction Set Principles
  8. ILP Part I: Compiler Techniques
  9. ILP Part II: Branch Prediction
  10. ILP Part III: Dynamic Scheduling
  11. ILP Part IV: Speculative Execution
  12. ILP Part V: Multiple Issue
  13. Limits to ILP
  14. Thread-Level Parallelism
  15. Multi-core Processors
  16. Multiprocessor Introduction
  17. Snooping Cache Multiprocessors
  18. Directory Based Multiprocessors
  19. Memory Hierarchy Review
  20. Advanced Memory Hierarchy
  21. Storage Systems

The Web Site of the Masters in Computer Engineering and Networks

Regulations of Granting the Masters Degree

Solution of the midterm Exam.

 

Grades

Grades including the midterm exam and the research project.